[libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Thu Jan 30 18:53:26 GMT 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=132

--- Comment #44 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-riscv.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/part_cmp/equal.py;h=2fdaabf46bde5284237ee6b0c0ff0efb00222f31;hb=4977861f9fbf1f48c4e5aa4362a56aff58efe7a8

hooray! working eq function!  stunning, i'm amazed.  the graphviz is a
total dog's dinner however actually having something working is really
critical.

some help reviewing this to see if there's a better way to do it really
appreciated.

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-riscv-dev mailing list