[libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=132

--- Comment #43 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-riscv.org/3d_gpu/3d_gpu/architecture/3d_gpu/architecture/dynamic_simd/eq/

i had to write out the boolean truth table. it appears to basically follow the
pattern of predicated findfirst (a vector opcode commonly found in vector
ISAs).

for bit zero of the output, on the first zero of the partition, starting from
MSB, the eqs are & daisychained, stopping when a "1" in the partition bits are
encountered.

for bit 1 of the output, if the previous (higher numbered) partition bit was
zero, then so is the output. otherwise it starts a new daisychain of &s

this is the "findfirst" aspect of the table.

i can do a crude version of this fairly easily, it will look awful and be
horrendously suboptimal and critically rely on yosys boolean algebraic
optimisation.

it would however be nice for this to be a leetle bit cleaner

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