[libre-riscv-dev] [Bug 130] FMIN/MAX needed

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=130

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
yeah go for it.  here's the scala reference code:
https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/tile/FPU.scala#L530

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