[libre-riscv-dev] PowerISA, NLNet grants

[Luke Kenneth Casson Leighton]

On Sun, Jan 19, 2020 at 2:27 AM Jacob Lifshay <programmerjake at gmail.com>
wrote:

Assuming we're careful with the design, we could make it be able to run
> RISC-V privileged instructions too by trapping on all of them. This would
> let us run a HW accelerated RISC-V virtual machine able to boot Linux.
>

this would be nice to add as an extra.


>
> We could potentially also implement MIPS and Sparc in a future version.
>

yes.  lots of work though :)

i like what ICT did: they only added the top 200 x86 instructions (mostly
FP ones) to Loongson.  they managed to get 70% of native x86 hardware
performance for FP-intensive applications, under qemu, despite qemu being
nominally a software emulator.

l.