[libre-riscv-dev] PowerISA, NLNet grants

Jacob Lifshay programmerjake at gmail.com
Sun Jan 19 02:26:52 GMT 2020


On Sat, Jan 18, 2020, 18:09 Hendrik Boom <hendrik at topoi.pooq.com> wrote:

> On Sat, Jan 18, 2020 at 10:15:52PM +0100, whygee at f-cpu.org wrote:
>
> > Some are already looking at POWER... but with a dual ISA
> > (or "why make it simple when it can be complex ?")
>
> A dual ISA will force you to keep a lot of the internals simple.
> They cannot involve kludges for one ISA or the other.


one of the other nice benefits of a dual ISA is being able to use all the
software written for both RISC-V and PowerISA, rather than being limited to
one or the other.

Assuming we're careful with the design, we could make it be able to run
RISC-V privileged instructions too by trapping on all of them. This would
let us run a HW accelerated RISC-V virtual machine able to boot Linux.

We could potentially also implement MIPS and Sparc in a future version.

Jacob


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