[libre-riscv-dev] [Mesa-dev] NLNet Funded development of a software/hardware MESA driver for the Libre GPGPU

[Jacob Lifshay]

On Mon, Jan 13, 2020 at 9:39 AM Jason Ekstrand <jason at jlekstrand.net> wrote:
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> On Mon, Jan 13, 2020 at 11:27 AM Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:
>> jason i'd be interested to hear your thoughts on what jacob wrote, does it alleviate your concerns, (we're not designing hardware specifically around vec2/3/4, it simply has that capability).
>
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> Not at all.  If you just want a SW renderer that runs on RISC-V, feel free to write one.  If you want to vectorize in hardware and actually get serious performance out of it, I highly doubt his plan will work.  That said, I wasn't planning to work on it so none of this is my problem so you're welcome to take or leave anything I say. :-)

So, since it may not have been clearly explained before, the GPU we're
building has masked vectorization like most other GPUs, it just that
it additionally supports the masked vectors' elements being 1 to 4
element subvectors.

If it turns out that using subvectors makes the GPU slower, we can add
a scalarization pass before the SIMT to vector translation, converting
everything to using more conventional operations.

Jacob