[libre-riscv-dev] NLNet Funded development of a software/hardware MESA driver for the Libre GPGPU

[Jason Ekstrand]

On Mon, Jan 13, 2020 at 11:27 AM Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

>
>
> On Monday, January 13, 2020, Jacob Lifshay <programmerjake at gmail.com>
> wrote:
>
>> On Thu, Jan 9, 2020 at 3:56 AM Luke Kenneth Casson Leighton
>> <lkcl at lkcl.net> wrote:
>> >
>>
>> > jacob perhaps you could clarify, here?
>>
>> So the major issue with the approach AMDGPU took where the SIMT to
>> predicated vector translation is done by the LLVM backend is that LLVM
>> doesn't really maintain a reducible CFG, which is needed to correctly
>> vectorize the code without devolving to a switch-in-a-loop.
>>
>
Welcome to working on GPUs.  :-)


> Hopefully, that all made sense. :)
>
>
> yes :) as you're actively designing this you have a way better handle on
> it.
>
> also, therefore, to be clear, to anyone interested in receiving funding to
> do this work, you can see that there will be someone else to work with who
> knows what they're doing, technically.
>
> thank you jacob.
>
> jason i'd be interested to hear your thoughts on what jacob wrote, does it
> alleviate your concerns, (we're not designing hardware specifically around
> vec2/3/4, it simply has that capability).
>

Not at all.  If you just want a SW renderer that runs on RISC-V, feel free
to write one.  If you want to vectorize in hardware and actually get
serious performance out of it, I highly doubt his plan will work.  That
said, I wasn't planning to work on it so none of this is my problem so
you're welcome to take or leave anything I say. :-)

--Jason