[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #31 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #28)

> It doesn't look like I have write access to the wiki git,

you do now.  git clone gitolite3 at git.libre-riscv.org:922/libreriscv.git
i think.  check HDL_workflow.

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