[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Sat Feb 29 20:40:15 GMT 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #32 from Michael Nolan <mtnolan2640 at gmail.com> ---
I'm moving the enums for each field in the table to a separate file. Would it
be acceptable to do a `from power_enums import *` in the decoder and testbench?

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