[libre-riscv-dev] [Bug 186] Create decoder for SOC

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #13 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #10)

> I can. We're definitely going to need a right shift instruction regardless
> of how we do rlwinm. Should I create a separate bug report for that or
> update progress under either this one or 173?


yes make it a separate one because this bugreport is about instruction
decode, not ALU implementation.  do cross-reference this bugreport though.

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