[libre-riscv-dev] [Bug 186] Create decoder for SOC

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=186

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |programmerjake at gmail.com

--- Comment #14 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #12)
> (In reply to Jacob Lifshay from comment #9)
> > (In reply to Luke Kenneth Casson Leighton from comment #6)
> > > therefore, lmw can quite literally be replaced with a SimpleV
> > > "SVPrefix" instruction.  SVP{VL=32}.LD r1, r2#D.
> > 
> > One thing to consider: lmw and similar is probably defined to read the
> > address register before writing to any registers, whereas SimpleV may not be
> > defined that way (but probably should be), this matters when the load
> > overwrites the address register part way through.
> 
> that's handled by the LD Function Unit.  Reservations are put on the
> registers (and on the memory address... *when calculated*).

My issue is not that it can't be implemented correctly in HW, but that having
the instruction switch the address used halfway through makes it much harder to
use in a compiler due to the inputs being overwritten part way through
execution.

It's the difference between load1 and load2 in:

int regs[];

// what I think SimpleV should be defined to do
void load1(int address_reg, int dest_reg, int N)
{
    int address = regs[address_reg];
    for(int i = 0; i < N; i++)
        regs[dest_reg + i] = *(int *)(address + sizeof(int) * i);
}

// what SimpleV is currently defined to do
void load2(int address_reg, int dest_reg, int N)
{
    for(int i = 0; i < N; i++)
        regs[dest_reg + i] = *(int *)(regs[address_reg] + sizeof(int) * i);
}

where load2 overwrites the address register halfway through so all the memory
accesses after that use the newly loaded value as the base address.

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