[libre-riscv-dev] [Bug 138] New: NLNet 2019 Coriolis2 Layout proposal

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=138

            Bug ID: 138
           Summary: NLNet 2019 Coriolis2 Layout proposal
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Milestones
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

A proposal to work with LIP6 to lay out the Libre RISC-V ASIC
with coriolis2 - https://libre-riscv.org/nlnet_2019_coriolis2/

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