[libre-riscv-dev] Application for funding for RISC-V ISA development for Video Acceleration: Call for Participation

[lkcl]

Under the current BitManip review thread the topic of including instructions within RISC-V was raised, that would, like NEON for ARM, allow any given RISC-V processor to decode video actually on that processor, without the need for special hardware acceleration custom blocks.

The most obvious candidate for such instructions - the easiest to illustrate - is YUV to RGB conversion. Without carefully designed opcodes, the bit manipulation of 12 to 14 bit data streams is really quite awkward and costly.

It therefore occurred to me that this would be a perfect candidate for a funding application under the NLNet "Privacy and Enhanced Trust" Programme.  The reason being that the majority of video decode blocks are opaque proprietary blocks, and therefore by definition cannot be trusted by endusers.

If anyone would like to be the recipient of donations in order to carry out this work, please do speak up.  Allow us to designate the isa-dev list as the best suitable location (remember to remove sw-dev and hw-dev from cc list).

I will begin a writeup shortly, and follow up.

Primarily we need at least one EU Citizen to participate. They do not have to be currently resident *in* the EU, they just have to have an EU address.

Apologies that we do not have long until the Oct 1st deadline, otherwise we have to aim for Dec 1st.

The idea here is to make RISCV a peer of ARM and Intel, both of which can easily decode up to 720p video.

L.