[libre-riscv-dev] FP16 FCVT needed (int, uint, fp32, fp64)

[lkcl]

On Friday, September 13, 2019 at 7:34:23 AM UTC+8, lkcl wrote:
> On Thursday, September 12, 2019 at 4:18:29 AM UTC+8, Bruce Hoult wrote:
> 
> > We do intend to have half precision FP in the scalar instruction set,
> > as it doesn't make sense to have it in the vector instruction set but
> > not scalar.
> 
> Ah before I forget:
> https://libre-riscv.org/rv_major_opcode_1010011/
> Search for FCVT
> 
> I arbitrarily chose some funct5 allocations to illustrate and ensure that it's not forgotten that FCVT FP16 opcodes will be needed.
> 
> Int/signed, 4 opcodes:
> FCVT.U/S.H
> FCVT.H.U/S
> 
> FP, 6 opcodes:
> FCVT.F/D/Q.H
> FCVT.H.F/D/Q

Re-read my own document, missed FCLASS.H, FMV.H, *face-palm* another 4 funct5 reservations needed.

L.