[libre-riscv-dev] [isa-dev] Re: SV / RVV, marking a register as VL.

[Jacob Lifshay]

On Wed, Sep 4, 2019, 09:20 lkcl <luke.leighton at gmail.com> wrote:

> Rats.
> [snip]
> Anyone any ideas or solutions?
>

I still think the full-function vectorization is workable, will explain in
more detail in follow-up email.

Jacob