[libre-riscv-dev] power pc
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu Oct 31 21:07:31 GMT 2019
On Thu, Oct 31, 2019 at 8:57 PM Jacob Lifshay <programmerjake at gmail.com> wrote:
> from reading the Power spec and Linux source, Power saves and restores all
> registers in a similar fashion for interrupts (there aren't any mips-like
> reserved-for-os GPRs).
gooood. oh - could you send me a link to some git-browse-tree-thing
which references the power context-switch source (and line)? i'll put
it in the wiki.
> the important part is that they're all
> saved/restored, not how they're saved/restored.
> we should be able to get risc-v to work just fine by writing a new entry
> point and/or using the kvm subsystem.
> the power syscall entry point doesn't save everything because it's more
> like a function call than an interrupt. all that's needed is for risc-v to
> map to a different entry point.
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