[libre-riscv-dev] power pc

Jacob Lifshay programmerjake at gmail.com
Thu Oct 31 21:25:21 GMT 2019


On Thu, Oct 31, 2019, 14:08 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> On Thu, Oct 31, 2019 at 8:57 PM Jacob Lifshay <programmerjake at gmail.com>
> wrote:
>
> > from reading the Power spec and Linux source, Power saves and restores
> all
> > registers in a similar fashion for interrupts (there aren't any mips-like
> > reserved-for-os GPRs).
>
> gooood.  oh - could you send me a link to some git-browse-tree-thing
> which references the power context-switch source (and line)?  i'll put
> it in the wiki.
>
the exception entry point:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/exceptions-64s.S?h=v5.4-rc5#n409

the rest of the context switch code is in a different file:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/entry_64.S?h=v5.4-rc5#n589

Jacob


More information about the libre-riscv-dev mailing list