[libre-riscv-dev] Growing a RISC-V GPU Community
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Sun Oct 13 13:12:22 BST 2019
On Sunday, October 13, 2019, Michael Pham <pham.michael.98 at gmail.com> wrote:
> Hi all,
>
> A while back on the mailing lists, Luke mentioned the possibility of
> an Open 3D Graphics Alliance. So as I was taking a short break from my
> homework, I tried to find out if anyone else is working on RISC-V
> GPUs. Well, the good and bad news is that Libre RISC-V is dominating
> the search results on Google when I tried to find some other RISC-V
> GPU projects :)
>
> However, I found at least one other RISC-V GPU effort.
> I think the name of it is "BaseJump Manycore", but the name isn't
> really clear from that page so I might be wrong. Check it out:
> https://fossi-foundation.org/2019/09/03/gsoc-64b-pointers-in-rv32
Excellent, do you want to get in touch with them?
Also add links on resources page?
> It looks like they are under the umbrella of the FOSSi Foundation
> https://fossi-foundation.org/fossi
>
> Would it make sense to form a collaboration with them?
>
Yes.
> Either directly
> or through the Open 3D Graphics Alliance?
>
> There was also something called "Hwacha". It is a vector processor but
> someone mentioned that it could also be used as a GPU.
> http://hwacha.org/
>
> From their slides and papers, they seem to have some good ideas that
> maybe Libre RISC-V could make use of indirectly?
>
>
Hwacha is Vector only. No good.
> Finally, I was visiting the RISC-V website to take a look at the
> upcoming sessions for the summit. Some groups are presenting
> interesting custom ISA extensions to RISC-V such as this one:
> https://tmt.knect365.com/risc-v-summit/agenda/1#
> hardwarearchitecture_a-risc-v-isa-extension-for-ultra-low-
> power-iot-wireless-signal-processing
>
> I thought it would make sense for maybe Luke and Pixilica/Open 3D
> Graphics Alliance to make a joint presentation at the next RISC-V
> summit on custom 3D graphics extensions to the ISA. It would help to
> spread awareness of all Libre RISC-V's proposals which could lead to
> support for making it into the standard officially (e.g. ztrans,
> zfpacc, etc.).
RISCV Foundation already turned the presentation down.
Yes, really.
>
> Based on the Google results, Libre RISC-V is the *most* notable effort
> to use RISC-V for graphics processing. So it makes sense for us to
> nurture the seeds of a RISC-V GPU community which could possibly help
> us out in the future. I think I saw that you guys were planning on
> going to FOSDEM so that's a good start. Next milestone: RISC-V Summit
> :)
>
> One more thing that's unrelated to graphics, is formal verification.
> Take a look at this session description:
> https://tmt.knect365.com/risc-v-summit/agenda/1#securityverification_
> democratising-formal-verification-of-risc-v-processors
>
> Wow! They found **many** bugs in the PULP and lowRISC processors. Some
> corner-case bugs that are almost impossible to catch through test
> cases and simulation. This really underlines the need to find someone
> to join the team to do formal verification of Libre RISC-V before we
> start manufacturing thousands of possibly faulty silicone.
>
>
Yyep. Now you know why we put in that application
Ok, I'm going back to my actual homework now.
>
> Michael
>
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