[libre-riscv-dev] Update on Pinmux

[Luke Kenneth Casson Leighton]

On Fri, Nov 22, 2019 at 4:53 PM Rishabh Jain <rishucoding at gmail.com> wrote:

> Hi everyone,
>
> Greetings!
>
> First of all, my apologies for not able to continue the project on porting
> pinmux into nmigen.
>
>
no problem.


> Presently, I am employed as a Project Associate, at the SHAKTI processor
> group, IIT Madras. My project aims to develop a RISC-V based SHAKTI C-Class
> multi-core setup, for which I am working on developing a Network on Chip.
>

cool!


> Repositories: shakti-gem5
> <https://gitlab.com/shaktiproject/tools/shakti-gem5> and OpenSMART
> <https://gitlab.com/shaktiproject/uncore/OpenSMART>.
>
> SHAKTI is also developing a SoC for E-class processor, where we are using
> Pinmux to manage peripherals.


surpriise :)  all SoCs need a pinmux.  otherwise the cost is just insane
and yields are very low.


> When I was trying to generate the
> 'pinmux.bsv' file for some configuration, I found it a little tricky in the
> beginning.
> So, I documented the steps to generate Bluespec, here:
> https://gitlab.com/rishabh.jain091/pinmux. I believe the README.md can be
> taken up in the upstream repository of libre-riscv.
>

yes please, please do keep it in sync, particularly if you are going to do
a lot of work on this.


> @luke, could you take a look at the README?
>

it looks really good.  feel free to sync it.

l.