[libre-riscv-dev] Fwd: Questions Port of AMDVLK/RADV 3D Driver to the Libre RISC-V SoC

[lkcl .]

https://libre-riscv.org/nlnet_2019_amdvlk_port/questions/

hi, we need to work on an answer here.  i've made a quick (brief) response
already.

l.

---------- Forwarded message ---------
From: Michiel Leenaars <michiel at nlnet.nl>
Date: Fri, Nov 22, 2019 at 12:07 PM
Subject: Questions Port of AMDVLK/RADV 3D Driver to the Libre RISC-V SoC
To: <nlnet_amdvlk_port at libre-riscv.org>



Dear Frieder,

you applied to the 2019-10 open call from NLnet. We have some questions
regarding your project Port of AMDVLK/RADV 3D Driver to the Libre RISC-V
SoC.

Can you provide a breakdown of the budget in each of the three stages,
and what rates did you use to arrive at the budget of 50k? Will you be
working on this project individually?

What happens in stage two if you find everything is *not* properly
functional? Will you able to identify and fix issues yourself, or are
you dependent on others? If so, do you think these people are friendly
to the effort?

How do you see future synchronisation with the evolving AMD code,
assuming this is still actively developed?

Thank you very much for your swift reply.

Kind regards,
on behalf of NLnet foundation,

Michiel Leenaars
Strategy Director
NLnet Foundation
+31 6 27 050 947
m.leenaars [at] nlnet.nl
sip/xmpp: michiel [@t] nlnet.nl

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