[libre-riscv-dev] chinese sponsor, looking to design an ECP5-based dev board

[Jacob Lifshay]

I think one thing that would probably be quite useful is, instead of having
ddr3 ram directly on the board, to have a ddr3 dimm or sodimm socket so
that the user can upgrade the ram to as much as they're willing to buy and
will fit, or just not use any if they don't need any. I think we should
support 64-bit sodimms (no support for ECC) and if we want to emulate
smaller bus widths, we can just disconnect some of the data lines.

I think it might be a good idea to have 2 sockets, each attached to a
separate ecp5, to facilitate testing NUMA systems (for the libre-riscv SoC,
that would be two SoCs connected together using OmniXtend or similar). We
can't share a socket between fpgas because the address and control lines
are common to all chips on a dimm.

After a cursory search, I found the socket for around $3, so we shouldn't
have to worry about cost too much.

Lattice document for connecting ddr3 dram to ecp5:
http://www.latticesemi.com/view_document?document_id=50467

Jacob