[libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Mon May 6 14:49:34 BST 2019


--- Comment #40 from Aleksandar Kostovic <alexandar.kostovic at gmail.com> ---

Done this from FPU verilog code, but i still dont know how i would integrate it

Can anyone help out?

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