[libre-riscv-dev] [Bug 74] preliminary exploratory software emulation of FP SQRT

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=74

--- Comment #40 from Aleksandar Kostovic <alexandar.kostovic at gmail.com> ---
https://git.libre-riscv.org/?p=ieee754fpu.git;a=blobdiff;f=src/ieee754/fpsqrt/fsqrt.py;h=15f1555d969098246dc9df4bf1f3ffce812d6958;hp=02449b0f75b41b0ba2e004711d9570ccca49ca3d;hb=2a273381d3f843cd58b99cbc45728761a4d12d0d;hpb=23daa4a7dbe5d98b00bbd468b35e7b2f2c782ff4

Done this from FPU verilog code, but i still dont know how i would integrate it
better.

Can anyone help out?

-- 
You are receiving this mail because:
You are on the CC list for the bug.