[libre-riscv-dev] [Bug 99] IEEE754 *pipelined* FPDIV unit needed

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=99

--- Comment #16 from Jacob Lifshay <programmerjake at gmail.com> ---
one other thing, the pipeline code needs to support one class having multiple
stages inside it, since the multiplier will go inside one class. additionally
parts of the multiplier will be used in the divider pipeline.

-- 
You are receiving this mail because:
You are on the CC list for the bug.