[libre-riscv-dev] VBLOCK Format, FSM Decoder
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu Jun 27 20:22:35 BST 2019
https://libre-riscv.org/simple_v_extension/vblock_format/?updated#index6h1
I worked out that the VBLOCK format decode may be done as a FSM. Traps can
return even part way through the decoding of the prefixes and use the state
inside the PCVBLK to determine exactly where they left off.
Also, simpler implementations can back-track to the beginning of the VBLOCK
and *re-read* the Register and Predicate info into internal state, instead
of having to cache it sonehow.
Once re-read they can continue execution in the VBLOCK where the trap
interrupted them.
It is totally not normal to expose FSM details like this to an ISA, I don't
care :)
L.
--
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
More information about the libre-riscv-dev
mailing list