[libre-riscv-dev] uniform instruction format

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sun Jun 23 07:09:02 BST 2019

Darn, nearly missed it, an extremely important thing: to support svlen
(SUBVL) the index (current value of the for loop) *must* be part of the
ie part of the STATE CSR.

Otherwise we are forced to actually make the svlen a full SIMD concept,
forcing implementors to create ALUs that will do 1, 2, 3 or 4 operations in
a group, per cycle.

Or, force them to treat the group as atomic in some other fashion, such as
preventing and prohibiting exceptions and so on.

An index allows implementors to break up the svlen loop into its individual

Only caught this after writing out the pseudocode for svlen.


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