[libre-riscv-dev] [Bug 78] IEEE754 FP "div" needed

[whygee at f-cpu.org]

On 2019-06-16 14:52, bugzilla-daemon at libre-riscv.org wrote:
> http://bugs.libre-riscv.org/show_bug.cgi?id=78
> 
> Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:
> 
>            What    |Removed                     |Added
> ----------------------------------------------------------------------------
>              Status|CONFIRMED                   |RESOLVED
>          Resolution|---                         |FIXED
> 
> --- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
> operational again (after elaboratable rework)

FDIV is often implemented with a FRECIP
(reciprocal) followed by a FMUL.