[libre-riscv-dev] Introducing Myself

[Tobias Platen]

On 06/08/2019 12:15 AM, Luke Kenneth Casson Leighton wrote:
> On Fri, Jun 7, 2019 at 5:16 PM Tobias Platen
> <hacks2019 at platen-software.de> wrote:
>
>>>> My Bachelor thesis was about implementing a cache for that processor.
>>> that's interesting, because one of the next tasks coming up quite soon
>>> will be to do that.  would you be interested to tackle that?  yes
>>> there is NLnet donations available.
>> Definitively I am interested in doing that. Where do I begin with?
> great!  you'll need this repo:
> https://git.libre-riscv.org/?p=soc.git;a=summary
>
> first though please do bear in mind, we have a charter.  it's explained here:
> https://libre-riscv.org/charter/discussion/
I know about the charter and I find its mostly ok.
>
> do let us know if it's ok?
>
> devnotes are here, they're quite straightforward:
> https://libre-riscv.org/3d_gpu/devnotes/
>
> dependencies: yosys (from latest git), nmigen (from latest git), and a
> minimum of python 3.6.  nosetests3 is also nice to have, and at some
> point epydoc will go into the Makefile(s).
I first will have to install the now python version. Since I have 
Trisquel 8 on my laptop, I currently have only Python 3.5.
>
> the TLB and cache codebase is here:
> https://git.libre-riscv.org/?p=soc.git;a=tree;f=src/TLB;h=2ef9c7bbf3719d84f741fe28a65ae9e13ac9e82d;hb=2b479fcb79b7989b86c8a30a5d33af9ceee33239
>
> the VM milestone is here:
> http://bugs.libre-riscv.org/show_bug.cgi?id=51
>
> it needs breaking down into sub-tasks (NLnet pays on milestone 100%
> completion), one of those being the L1 and L2 caches.
>
> i've been slowly morphing ariane source code over to nmigen.  am
> currently working through miss_handler.py
>
> that's quite a lot already :)
>
> l.
>
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