[libre-riscv-dev] [Bug 93] New: add Cache-as-ram mode for boot
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Wed Jun 5 08:29:01 BST 2019
http://bugs.libre-riscv.org/show_bug.cgi?id=93
Bug ID: 93
Summary: add Cache-as-ram mode for boot
Product: Libre Shakti M-Class
Version: unspecified
Hardware: All
OS: All
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Specification
Assignee: lkcl at lkcl.net
Reporter: programmerjake at gmail.com
CC: libre-riscv-dev at lists.libre-riscv.org
NLnet milestone: ---
see:
http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-June/001677.html
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the libre-riscv-dev
mailing list