[libre-riscv-dev] IEEE754 FPU

[Luke Kenneth Casson Leighton]

64-bit add is added, by changing all of the "magic constants" in the
fpbase.py class (and removing any of the extraneous ones still left in
fadd.py)

only three tests in the (preliminary) test_add64.py, working fine.

basically, i did a "diff -uwbB adder.v ../double_adder/double_adder.v"
and identified the width of the mantissa, exponent, magic constants
128 ==> 1024, 127 ==> 1023, and so on.

no need to actually do the conversion on double_adder.v at all, just
trust the diff and some common sense.

l.