[libre-riscv-dev] [isa-dev] Re: FP transcendentals (trigonometry, root/exp/log) proposal

MitchAlsup MitchAlsup at aol.com
Tue Aug 13 22:38:21 BST 2019



On Tuesday, August 13, 2019 at 4:05:30 PM UTC-5, lkcl wrote:
>
> On Tuesday, August 13, 2019 at 11:40:39 PM UTC+8, MitchAlsup wrote:
>  
> > My actual implementation folds ATAN into ATAN2 and changes the last 2 
> lines into::
>
> Thx Mitch have made a note so it's not lost in list noise.
>
> Also appreciate the microcode suggestions, have to give that some serious 
> thought, whether to do something truly microcode-like or whether to do just 
> a mini SRAM that contains subroutines that reprogrammable RISCV opcodes can 
> use.
>
> Much lower level may prove more useful, micro code operations to do FP 
> prenormalisation, post normalisation etc. all at expanded bitwidths.
>
> L.
>

The "KIND" of microcode I suggest is the kind where the Calculation Unit is 
microcoded and the data path it sits on remains <whatever it was>. 

Microcoding the main F/D/E part of the pipeline is strongly discouraged.

Think of microcode as if it were a sequencer, just express that sequencer 
in such a way that the synthesizer can implement it with a table, with just 
gates, or with some kind of ROM. Then you don't have to decide if it is 
microcoded (or not) the synthesizer carries the load.


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