[libre-riscv-dev] [isa-dev] Re: FP transcendentals (trigonometry, root/exp/log) proposal
luke.leighton at gmail.com
Wed Aug 14 00:02:16 BST 2019
On Tuesday, August 13, 2019 at 10:38:21 PM UTC+1, MitchAlsup wrote:
> Think of microcode as if it were a sequencer, just express that sequencer
> in such a way that the synthesizer can implement it with a table, with just
> gates, or with some kind of ROM. Then you don't have to decide if it is
> microcoded (or not) the synthesizer carries the load.
[with thanks to Dan as well, for the advice to avoid SRAMs] - part of the
issue i am having difficulty with here on these lists is that i don't have
the same kind of formal training as other participants, yet am capable of
deriving solutions "as needed" - some of them entirely new, some extremely
well-known for decades and "obvious" to anyone with formal training.
i completely lack the "technical terms" to communicate both the latter
*and* the former in an "immediate" fashion that satisfies busy "formally
trained" technical people.
so yes, after about 4-5 round-trip messages over several days, we can
finally identify that the scheme that Jacob and I came up with - a
combination of an opcode field, an FSM that advances that opcode field, and
a "feedback" loop that puts intermediary results *back* into the pipeline -
is in fact called a "gate-driven microcode engine" in modern computing
gah, finally! so, yes, going back several messages: yes, absolutely love
the microcode idea, Mitch :)
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