[libre-riscv-dev] [Bug 72] verilog to nmigen converter (full or partial) needed

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=72

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
any other ideas? (will update comment 1 to clarify the requirement
to preserve as much of the original code as possible)

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