[libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations

[Luke Kenneth Casson Leighton]

On Fri, Apr 5, 2019 at 6:18 AM Aleksandar Kostovic
<alexandar.kostovic at gmail.com> wrote:
>
> Fixed it. Also have let it run for more than 2000 test vectors so it should
> be ok :)

 awesome :)

 so, annoyingly, i apologise: none of the other functions are
candidates, perhaps except put_z, for modification.  would you like to
research fsqrt for now?
http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-March/000926.html

 or, we also need fcvt, (32-to-64, 64-to-32 etc.) which are in jon
dawson's library, converted from verilog to nmigen.

l.