[libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations

[Luke Kenneth Casson Leighton]

okaay aleksander, FINALLY, this is the level of "simplicity" i was
aiming for, for several weeks:

https://git.libre-riscv.org/?p=ieee754fpu.git;a=blob;f=src/add/nmigen_add_experiment.py;h=3689d61e0c69ffa2a0ad3e35eb9982da44074024;hb=HEAD#l1858

that's it - that's all there is to it.

i'd also like the get_compact_fragment function to be tsimilarly that
simple, except that the stb/ack trigger stuff is getting in the way,
so the setup functions have to be called manually for now.

the "longer_fragment" version is for when people want to do a really
small state machine, and don't mind multi-cycle stage times.  i
haven't tested this in a while and i know it won't work.

all this really needs a code review and some thought.

in the meantime, i had an idea: we will need a square-root function.
do you want to have a go at converting the isqrt function listed on
the wikipedia page here into python?  should be well under 15-20
minutes work, but it's an important first step:

https://en.wikipedia.org/wiki/Methods_of_computing_square_roots#Binary_numeral_system_(base_2)
https://web.archive.org/web/20120306040058/http://medialab.freaknet.org/martin/src/sqrt/sqrt.c

the next stage after that would be to convert it to cope with base 4
(i can help with that), and the stage after *that* would be to make
some sort of exponent/mantissa variant.  of course, the square root of
the exponent is just... err... divide by two, which is a shift left!
duh!

somewhere on the internet there will be an IEEE754 sqrt....

l.