[Libre-soc-bugs] [Bug 865] implement vector bitmanip opcodes

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sat Jun 25 02:41:43 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=865

--- Comment #21 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #20)

> thinking about a bit more, imho the mode2 options should be `RA - 1` and `RA
> + 1` since that saves gates, not requiring xor gates on the output of the
> add.

so i am sort-of getting it, but only because OP_ADD, copied from
microwatt, is already subdivided down into

* select a or neg-input-a
* select add 1/0/CA
* select output or neg-output

and the end result is to create an amazing number of arithmetic ops
with the exact same add hardware.

here is the a / neg-a selection anyway:

+    a1 = RA if mode&1 else ~RA

if i understand correctly, what you are saying is
that the mode-bits can be "morphed" to do the same
thing?

saving one bit to add one bit, doesn't totally make sense:
if they are totally equivalent there's not much point

BUT

if things can be morphed such that it fits *directly*
with the existing OP_ADD (ok except the OR, AND and XOR)
that's worth pursuing because it saves gates.

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-soc-bugs mailing list