[Libre-soc-bugs] [Bug 865] implement vector bitmanip opcodes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=865

--- Comment #17 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #14)
> (In reply to Jacob Lifshay from comment #11)
> 
> > for adde RT, RA, RB: set the bit in RA when the element add
> 
> as a Vectorised instruction

I'm referring to *scalar* adde, all those references to vector elements are to
illustrate how to set the bits in the input registers to make adde do what you
want.

> 
> cprop is one single 32-bit scalar instruction that produces up to
> 64 bits of carry-propagation results.

adde is one single 32-bit scalar instruction that produces 65 bits of
carry-propagation results (64 in RT, 1 in CA)

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