[Libre-soc-bugs] [Bug 865] implement vector bitmanip opcodes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=865

--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #11)

> for adde RT, RA, RB: set the bit in RA when the element add

as a Vectorised instruction to produce a vector of carry-propagation
bits that's ultra-expensive, triggering an astounding number of
register hazards and causing huge numbers of 64-bit registers
to be utilised for the sole purpose of storing binary single-digit
values.

cprop is one single 32-bit scalar instruction that produces up to
64 bits of carry-propagation results.

-- 
You are receiving this mail because:
You are on the CC list for the bug.