[Libre-soc-bugs] [Bug 671] convert spec pseudocode to use XLEN width

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Sep 6 05:09:46 BST 2021


https://bugs.libre-soc.org/show_bug.cgi?id=671

--- Comment #65 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to dmitry.selyutin from comment #64)
> (In reply to Jacob Lifshay from comment #62)
> > In the case of addg6s, it totally can have XLEN overridden, since what it
> > does is done on individual BCD digits (4-bit units)
> 
> I'm talking not only of can it be done or not, but also of the specs.

ok, though changing the spec's wording may be a pain, I don't think we should
just declare BCD instructions too hard to support with SV when there is an
obvious way to extend addg6s in particular to arbitrary elwidth.

If we did just decide to skip some instructions just because we'd have to
modify the spec text, I think the people on the ISA WG reviewing how SV works
would take that as evidence of SV being inconsistently applied and half-baked,
increasing our chances of rejection.

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