[Libre-soc-bugs] [Bug 737] in-order single-issue Power ISA 3.0 core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=737

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=nmutil.git;a=blob;f=src/nmutil/test/test_outmux_pipe.py;h=d94b6394b55519d3a1f8383f24d3abde4c6e9539;hb=HEAD#l125

here is an example of how to use MultiOutPipe, although it may not
becessarily be appropriate because of the different data sets
(different subsets of decoding for different pipelines). it *might*
still work though.

the muxid would be set to the fan-out pipeline number, where a map
was needed: muxid 0 => ALU, muxid 1 => Logical etc.

although... looking now at Core connect_instruction i think it takes
care of the fan-out perfectly well without needing MultiOutPipe
https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/simple/core.py;hb=HEAD#l193

so i think mostly instead it is fine to have a simple linear pipeline:

* fetch
* decode
* issue to Core which handles fanout

stall condition would be that the issue to core would not send "ready_o"
if it was detected that the Global Hazard Vector had a bit set.

each pipeline stage can be set as a StageAPI instance, but due to
the stalling you have to have functions which say if the data
is ready to be accepted
https://git.libre-soc.org/?p=nmutil.git;a=blob;f=src/nmutil/test/test_buf_pipe.py;h=e738657a08c20fce0b97f8d87be3c21b22fa88be;hb=HEAD#l721

 720     @property
 721     def d_ready(self):
 722         """ data is ready to be accepted when this is true
 723         """
 724         return (self.count == 1)  # | (self.count == 3)
 725         return Const(1)
 726 
 727     def d_valid(self, i_ready):
 728         """ data is valid at output when this is true
 729         """
 730         return self.count == self.valid_trigger
 731         return Const(1)

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