[Libre-soc-bugs] [Bug 485] Create I-Cache from microwatt icache.vhdl

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Sep 29 17:25:49 BST 2020


--- Comment #19 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #15)

> !! So eq(1) is only the first bit, but eq(0) is all the bits of the Signal?


whatever value you place into the LHS is zero extended.

therefore eq(1) will be 1 in the LSB and all zeros in the remaining MSBs.

which is why eq(~1) is especially doubly wrong.

this places 0b1111111111111111111110 into the LHS i.e a 0 in the LSB and all 1s
in the MSBs.

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