[Libre-soc-bugs] [Bug 475] cxxsim improvements

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Sep 27 16:44:49 BST 2020


--- Comment #13 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
an intriguing but ultimately simple find :)

it is quite normal to expect the remaining bits (MSBs) to be set to zero, and
also for any bits that will not fit in the LHS to be thrown away.

this for example is how all 1s are set: x.eq(~0) or x.eq(-1) where x is
unsigned and way less than 64 bit.

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