[Libre-soc-bugs] [Bug 490] Complete peripheral set including litex for first functional POWER9 Core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=490

--- Comment #16 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
Staf: i just managed to (successfully) get openocd connected to
litex "jtagremote" module under simulation.

Info : JTAG tap: libresoc.tap tap/device found: 0x000018ff (mfg: 0x47f
(<invalid>), part: 0x0001, ver: 0x0)

however i had to add this to the openocd.cfg file:

jtag newtap libresoc tap -irlen 1 -expected-id 0x000018ff

that should be "irlen 4" because i set ir_width=4.

the only reason i can think of why that would happen is if the bit-order
for IR is inverted in c4m JTAG.

-- 
You are receiving this mail because:
You are on the CC list for the bug.