[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=517

--- Comment #62 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
Ensure power is disconnected from FPGA
Ensure STLINKV2 USB is disconnected
Ensure FPGA USB is disconnected

i mean, "put those into the checklist table"

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