[Libre-soc-bugs] [Bug 469] New: Create D-cache from microwatt dcache.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=469

            Bug ID: 469
           Summary: Create D-cache from microwatt dcache.vhdl
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: normal
          Priority: Normal
         Component: Source Code
          Assignee: colepoirier at gmail.com
          Reporter: colepoirier at gmail.com
                CC: libre-soc-bugs at lists.libre-soc.org
        Depends on: 450
          Deadline: 2020-09-30
   NLnet milestone: NLNet.2019.10.Wishbone
    parent task for 383
 budget allocation:

The goal is to achieve a working D-cache by translating microwatt's vhdl dcache
code

***Must follow up on nmigen SRAM attributes***


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=450
[Bug 450] Create MMU from microwatt mmu.vhdl
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