[libre-riscv-dev] [Bug 351] create a "block" (mass) regfile port (read and write) onto an array-based regfile

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=351

--- Comment #13 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
added a "demo" unit test that seems to show that it's functional.  i added
one extra read port and HOLY cow did the number of gates jump.  that's just
a 32-bit register.  luckily we only need one of them.

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