[libre-riscv-dev] [Bug 313] Create Branch Pipeline for POWER9

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=313

--- Comment #39 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/fu/branch/pipe_data.py;h=28099eaa84f065065132208abaa9d8fa4a6f003f;hb=HEAD

whoops the regspec for cr needs to be 0:3 range.  4 means "select bit 4 only". 
ie only a 1 bit wide CR.

-- 
You are receiving this mail because:
You are on the CC list for the bug.