[libre-riscv-dev] [Bug 333] investigate why CR pipeline code took 100% CPU and locked up generating ILANG
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Fri May 22 14:49:14 BST 2020
https://bugs.libre-soc.org/show_bug.cgi?id=333
--- Comment #31 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #30)
> (In reply to Luke Kenneth Casson Leighton from comment #26)
> > ls -altr
> >
> > 90820 May 21 20:27 cr_pipeline.il
> >
> > WOW. down from 600k to 90k.
> >
> > absolutely massive difference.
>
> Gates are down too, from 2186 to 818
superb. i don't believe we switched one problem for another: the
Condition Regfile can be designed in a manageable fashion, not
involving accidental creation of massive crossbars.
> Finally managed to get the CR proof working by leaving the original proof
> bits intact, and adding machinery to select the cr inputs and combine it
> back into the outputs.
eek :)
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the libre-riscv-dev
mailing list