[libre-riscv-dev] [Bug 316] bperm TODO

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=316

--- Comment #92 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
Big endianess: LSB starts at top numbered wire, MSB is in wire 0.

little: LSB is in wire 0.

to access 64 bit in BE you do this
x[63-index]
not
x[index]

to access 32 bit in BE you do this:
x[31-index]

so somewhere, that is what is needed.

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