[libre-riscv-dev] [Bug 333] investigate why CR pipeline code took 100% CPU and locked up generating ILANG

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed May 20 19:59:26 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=333

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
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           Priority|---                         |High

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
cut it down drastically by not using an Array.  sigh.  they were so good,
too.

the cr_out_array is still producing a full crossbar.  it's dreadful.
given that we have to do that reg-splitting for XER, i'm inclined to
suggest we do the same here, and to have inputs and outputs as
crN, indexed, selected and routed *externally* like RA, RB, RC and RT/RS.

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