[libre-riscv-dev] daily kan-ban update 19may2020

Jacob Lifshay programmerjake at gmail.com
Tue May 19 18:13:35 BST 2020


On Tue, May 19, 2020, 05:00 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> except, i can't complete the diagram because i am blocked waiting for Jacob
> to do the DIV and MUL pipelines, which we have found highlights clearly
> what regs are needed in ways that a cursory examination does not reveal.


I'll be working on the mul and div pipelines today, I'm planning on adding
mul-add and mul-sub support to the partitionable multiplier since that's
much easier than writing a whole new multiplier. Will then add the FU
interface logic needed to drive it, perhaps in simplified form (1 mul per
clock, no packing smaller muls together) since that would allow me to get
back to the load/store unit faster. If there's spare time later, it can be
made fancier to allow issuing multiple smaller ops per clock and/or have
fpmul/fpmuladd added.

Will modify the fpdiv pipe to add idiv/udiv/irem/urem as well as div by
zero and int overflow detection, will then use that in the DIV FUs, can add
support for fdiv/fsqrt/frsqrt if there's spare time later.

I picked both those routes since that seems like the path of least
resistance, and because it makes adding fp later that much easier.

Jacob


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